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Pending provisionalProvisional application · 79 claims

Synapse AI · Edge-AI Engine Management

Synapse edge-AI engine control

Edge-AI engine management combining dual-core inference and deterministic timing, sensor interfaces, voltage compensation, over-the-air learning, and hardware safety mechanisms.

Source abstract

An engine control apparatus and method for internal combustion engines comprising an asymmetrical multi-processing (AMP) architecture on an ESP32-S3 dual-core Xtensa LX7 microcontroller operating at 240 MHz. Core 0 (PRO_CPU) executes non-deterministic TensorFlow Lite Micro (TFLM) INT8 quantized neural network inference in PSRAM to replace static volumetric efficiency tables, while Core 1 (APP_CPU) executes deterministic angle-domain interrupt service routines in IRAM with sub-microsecond latency. An asynchronous neural-kinematic translation layer converts time-domain AI predictions into angle-domain hardware timer events with voltage-compensated injector dead-time and coil dwell calculations. The system includes closed-loop wideband oxygen sensor PID trimming with anti-windup and thermal abort, over-the-air active learning with double-buffered atomic model swapping and replay buffer, hardware-in-the-loop validation with sub-nanosecond jitter waveform generation, AES-256-XTS flash encryption, and ISO 26262 ASIL-B compliant limp-mode fallback. The system is modular for any N-cylinder 4-stroke engine through parameterized cylinder count and firing order configuration.

Technology themes

ECU power hardwareCrank sensingDual-core real-time controlNeural-kinematic translationEmbedded model optimizationClosed-loop safety controlOTA active learningHardware-in-the-loop testingInjection and ignition executionECU security and resilienceModular engine configurationIntegrated engine management

Portfolio inclusion

Synapse is a separate pending provisional entry. Its 79 source claims are included in the AgentixOS licensing portfolio alongside the communication patent family.

View complete-portfolio licensing

Pending provisional claims

All 79 named claims

12 independent · 67 dependent

Dependency references are shown exactly as written in the supplied document. Technical theme labels are separate from those references.

Claim 1independentHigh-current ECU board with isolated power planes and thermal vias

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

An engine control apparatus comprising a 4-layer printed circuit board with dedicated L2 GND_Power and L3 +12V planes separated by a star-ground net-tie, wherein the power plane carries transient currents up to 27.41 A without exceeding 10 °C temperature rise per IPC-2221, and thermal vias stitch D2PAK pads to the bottom copper plane with θ_total ≤ 5 °C/W.

Explain this claim with UniGrok
Claim 2dependentStar-ground isolation for low-noise analog sensors

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

Source references as written: 1

The apparatus of claim 1 wherein the star-ground net-tie isolates analog sensor grounds from power grounds to maintain <20 mV bounce.

Explain this claim with UniGrok
Claim 3dependentParallel AMPSEAL power and ground connections

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

Source references as written: 1

The apparatus of claim 1 further comprising parallel AMPSEAL pins (2× +12V, 4× GND_Power) rated for 52 A continuous.

Explain this claim with UniGrok
Claim 4dependentDriver-pad thermal via arrays

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

Source references as written: 1

The apparatus of claim 1 wherein all output FET/IGBT pads include 3×3 arrays of 0.3 mm untented thermal vias.

Explain this claim with UniGrok
Claim 5dependentAutomotive transient protection and stable power regulation

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

Source references as written: 1

The apparatus of claim 1 further comprising ISO 7637-2 compliant TVS clamping and LM76002 buck with feedback divider for 5.04 V rail stability.

Explain this claim with UniGrok
Claim 6dependentBoot-mode protection for ESP32-S3 strapping pins

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

Source references as written: 1

The apparatus of claim 1 wherein ESP32-S3 strapping pins are guarded by 10 kΩ pull-downs to prevent boot-mode corruption.

Explain this claim with UniGrok
Claim 7dependent240 MHz dual-core ESP32-S3 controller

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

Source references as written: 1

The apparatus of claim 1 wherein the ESP32-S3 dual-core Xtensa LX7 MCU operates at 240 MHz with 4.16 ns instruction cycle and 7-stage pipeline.

Explain this claim with UniGrok
Claim 8independentAdaptive crank sensing with missing-tooth normalization

Discovery summary

Adaptive crank sensing and synchronization

Crank sensingAdaptive crank sensing and synchronization

Exact provisional claim wording

A variable reluctance crank sensor interface using MAX9926 with adaptive threshold tracking and differential RC filtering (R_s = 10 kΩ, C_diff = 1000 pF) that normalizes missing-tooth gaps via Δt_prev_norm = Δt_missing / (M+1) to maintain synchronization at 12,000 RPM.

Explain this claim with UniGrok
Claim 9dependentFPU-free bitwise crank-gap detection

Discovery summary

Adaptive crank sensing and synchronization

Crank sensingAdaptive crank sensing and synchronization

Exact provisional claim wording

Source references as written: 2

The interface of claim 2 further comprising bitwise gap detection (dt > (prev + (prev >> 1)) && dt < (prev << 2)) to bypass FPU.

Explain this claim with UniGrok
Claim 10dependentCrank-input EMI pulse rejection

Discovery summary

Adaptive crank sensing and synchronization

Crank sensingAdaptive crank sensing and synchronization

Exact provisional claim wording

Source references as written: 2

The interface of claim 2 wherein EMI debounce rejects pulses <150 µs (equivalent to 16,666 RPM).

Explain this claim with UniGrok
Claim 11dependentIgnition timing anchored at tooth ten

Discovery summary

Adaptive crank sensing and synchronization

Crank sensingAdaptive crank sensing and synchronization

Exact provisional claim wording

Source references as written: 2

The interface of claim 2 further comprising hardware anchor at tooth 10 (210° BTDC) for ignition timing.

Explain this claim with UniGrok
Claim 12dependentFixed-point crank angular timing representation

Discovery summary

Adaptive crank sensing and synchronization

Crank sensingAdaptive crank sensing and synchronization

Exact provisional claim wording

Source references as written: 2

The interface of claim 2 wherein angular velocity ω = Δt_n / θ_step is stored in Q15.16 fixed-point format.

Explain this claim with UniGrok
Claim 13dependentLow-latency crank interrupt capture in IRAM

Discovery summary

Adaptive crank sensing and synchronization

Crank sensingAdaptive crank sensing and synchronization

Exact provisional claim wording

Source references as written: 2

The interface of claim 2 further comprising ESP32 GPIO_NUM_1 crank input with IRAM_ATTR ISR latency <0.5 µs.

Explain this claim with UniGrok
Claim 14independentDual-core isolation of neural inference and engine timing

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

A dual-core embedded controller wherein Core 0 (PRO_CPU) executes non-deterministic TFLM INT8 inference in 16-byte aligned PSRAM arena while Core 1 (APP_CPU) executes deterministic angle-domain ISRs in IRAM_ATTR with zero interrupts routed to Core 1, achieving <0.5 µs latency at 240 MHz.

Explain this claim with UniGrok
Claim 15dependentAligned PSRAM tensor arena allocation

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

Source references as written: 3

The controller of claim 3 wherein tensor arena is allocated via heap_caps_aligned_alloc(16, MALLOC_CAP_SPIRAM).

Explain this claim with UniGrok
Claim 16dependentSpinlock-protected cross-core sensor sharing

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

Source references as written: 3

The controller of claim 3 further comprising portMUX_TYPE spinlocks for cross-core sensor sharing.

Explain this claim with UniGrok
Claim 17dependentCrank timing measurement for the velocity matrix

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

Source references as written: 3

The controller of claim 3 wherein crank ISR uses esp_timer_get_time() for velocity matrix ω_n = Δt_n / θ_step.

Explain this claim with UniGrok
Claim 18dependentNonnegative timer wait clamp for engine protection

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

Source references as written: 3

The controller of claim 3 further comprising anti-hydrolock clamp t_wait_us = max(0U, calculated_wait).

Explain this claim with UniGrok
Claim 19dependentHardware ignition timers anchored at 210 degrees BTDC

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

Source references as written: 3

The controller of claim 3 wherein ignition timing uses hardware timers anchored at 210° BTDC.

Explain this claim with UniGrok
Claim 20dependentFixed-point interrupt math without FPU stalls

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

Source references as written: 3

The controller of claim 3 further comprising Q15.16 fixed-point math throughout ISR path to eliminate FPU stalls.

Explain this claim with UniGrok
Claim 21dependentIRAM code and DRAM variables for predictable timing

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

Exact provisional claim wording

Source references as written: 3

The controller of claim 3 wherein all ISR code is mapped to IRAM_ATTR and critical variables to DRAM_ATTR to prevent SPI cache-miss latency.

Explain this claim with UniGrok
Claim 22independentAsynchronous neural-to-angle-domain timing translation

Discovery summary

AI outputs to angle-domain hardware events

Neural-kinematic translationAI outputs to angle-domain hardware events

Exact provisional claim wording

An asynchronous neural-kinematic translation apparatus that converts time-domain TFLM outputs into angle-domain hardware timer events using θ_dwell = t_dwell / ω and t_wait_us = max(0U, (θ_anchor − (θ_adv + θ_dwell)) × ω, with hardware clamp to prevent uint32_t underflow.

Explain this claim with UniGrok
Claim 23dependentMissing-tooth correction for deceleration timing

Discovery summary

AI outputs to angle-domain hardware events

Neural-kinematic translationAI outputs to angle-domain hardware events

Exact provisional claim wording

Source references as written: 4

The apparatus of claim 4 wherein missing-tooth normalization prevents deceleration math corruption.

Explain this claim with UniGrok
Claim 24dependentBitwise gap detection in neural timing translation

Discovery summary

AI outputs to angle-domain hardware events

Neural-kinematic translationAI outputs to angle-domain hardware events

Exact provisional claim wording

Source references as written: 4

The apparatus of claim 4 further comprising bitwise gap detection without FPU.

Explain this claim with UniGrok
Claim 25dependentHardware limits for spark advance

Discovery summary

AI outputs to angle-domain hardware events

Neural-kinematic translationAI outputs to angle-domain hardware events

Exact provisional claim wording

Source references as written: 4

The apparatus of claim 4 wherein spark advance is clamped to hardware bounds (-10° to 45° BTDC).

Explain this claim with UniGrok
Claim 26dependentInjector duty-cycle clamp to prevent static lock

Discovery summary

AI outputs to angle-domain hardware events

Neural-kinematic translationAI outputs to angle-domain hardware events

Exact provisional claim wording

Source references as written: 4

The apparatus of claim 4 further comprising duty-cycle pre-clamp to 95 % to prevent static lock.

Explain this claim with UniGrok
Claim 27dependentFixed-point arithmetic for timing translation

Discovery summary

AI outputs to angle-domain hardware events

Neural-kinematic translationAI outputs to angle-domain hardware events

Exact provisional claim wording

Source references as written: 4

The apparatus of claim 4 wherein all timing math uses Q15.16 to guarantee 4.16 ns resolution.

Explain this claim with UniGrok
Claim 28dependentBattery-voltage filtering for dead-time and dwell scaling

Discovery summary

AI outputs to angle-domain hardware events

Neural-kinematic translationAI outputs to angle-domain hardware events

Exact provisional claim wording

Source references as written: 4

The apparatus of claim 4 further comprising low-pass VBATT filter for stable dead-time and dwell scaling.

Explain this claim with UniGrok
Claim 29independentINT8 neural-model quantization from normalized dyno data

Discovery summary

INT8 quantization and training pipeline

Embedded model optimizationINT8 quantization and training pipeline

Exact provisional claim wording

A post-training INT8 quantization pipeline for engine control wherein representative_dataset generator uses MinMaxScaler-normalized dyno data to compute per-tensor scale and zero_point values, ensuring input->data.int8 and output tensors match hardware expectations and execute in <5 ms on ESP32-S3.

Explain this claim with UniGrok
Claim 30dependentExplicit INT8 inference input enforcement

Discovery summary

INT8 quantization and training pipeline

Embedded model optimizationINT8 quantization and training pipeline

Exact provisional claim wording

Source references as written: 5

The pipeline of claim 5 further comprising explicit inference_input_type = tf.int8 enforcement.

Explain this claim with UniGrok
Claim 31dependentCompute-budget limits on neural-network layers

Discovery summary

INT8 quantization and training pipeline

Embedded model optimizationINT8 quantization and training pipeline

Exact provisional claim wording

Source references as written: 5

The pipeline of claim 5 wherein model architecture is constrained to Dense(64/32) for MAC cycle budget.

Explain this claim with UniGrok
Claim 32dependentSIMD-aligned model export as a C array

Discovery summary

INT8 quantization and training pipeline

Embedded model optimizationINT8 quantization and training pipeline

Exact provisional claim wording

Source references as written: 5

The pipeline of claim 5 further comprising alignas(16) C-array export for SIMD safety.

Explain this claim with UniGrok
Claim 33dependentReplay-buffer training against catastrophic forgetting

Discovery summary

INT8 quantization and training pipeline

Embedded model optimizationINT8 quantization and training pipeline

Exact provisional claim wording

Source references as written: 5

The pipeline of claim 5 wherein training uses replay buffer to prevent catastrophic forgetting.

Explain this claim with UniGrok
Claim 34dependentLearning-rate decay matched to engine thermal inertia

Discovery summary

INT8 quantization and training pipeline

Embedded model optimizationINT8 quantization and training pipeline

Exact provisional claim wording

Source references as written: 5

The pipeline of claim 5 further comprising exponential learning-rate decay tied to engine thermal inertia τ = 30 s.

Explain this claim with UniGrok
Claim 35independentWideband PID safety supervision of AI fuel predictions

Discovery summary

Wideband PID and thermal supervision

Closed-loop safety controlWideband PID and thermal supervision

Exact provisional claim wording

A closed-loop safety hypervisor that applies PID trim to AI fuel predictions using Bosch LSU 4.9 physics transfer function AFR = 2.375V + 7.3125, with integral anti-windup clamp (±20), dT/dt EGT abort (<40 °C/s), and cumulative BTU heat-soak monitoring to maintain AFR within 9–18 under all operating conditions.

Explain this claim with UniGrok
Claim 36dependentLow-pass filtering for closed-loop safety control

Discovery summary

Wideband PID and thermal supervision

Closed-loop safety controlWideband PID and thermal supervision

Exact provisional claim wording

Source references as written: 6

The hypervisor of claim 6 further comprising Nyquist-compliant low-pass filter (τ = 50 ms).

Explain this claim with UniGrok
Claim 37dependentOxygen-sensor heater stabilization timer

Discovery summary

Wideband PID and thermal supervision

Closed-loop safety controlWideband PID and thermal supervision

Exact provisional claim wording

Source references as written: 6

The hypervisor of claim 6 wherein sensor warm-up timer enforces 30 s heater stabilization.

Explain this claim with UniGrok
Claim 38dependentBounded fuel-trim authority over AI predictions

Discovery summary

Wideband PID and thermal supervision

Closed-loop safety controlWideband PID and thermal supervision

Exact provisional claim wording

Source references as written: 6

The hypervisor of claim 6 further comprising hard trim limits (±20 %) to bound AI override.

Explain this claim with UniGrok
Claim 39dependentCoolant and exhaust temperature cooldown triggers

Discovery summary

Wideband PID and thermal supervision

Closed-loop safety controlWideband PID and thermal supervision

Exact provisional claim wording

Source references as written: 6

The hypervisor of claim 6 wherein ECT > 110 °C or EGT > 950 °C triggers dyno cooldown.

Explain this claim with UniGrok
Claim 40dependentIRAM fallback after PSRAM failure

Discovery summary

Wideband PID and thermal supervision

Closed-loop safety controlWideband PID and thermal supervision

Exact provisional claim wording

Source references as written: 6

The hypervisor of claim 6 further comprising IRAM limp-mode fallback on PSRAM failure.

Explain this claim with UniGrok
Claim 41dependentSafety clamps before hardware timer scheduling

Discovery summary

Wideband PID and thermal supervision

Closed-loop safety controlWideband PID and thermal supervision

Exact provisional claim wording

Source references as written: 6

The hypervisor of claim 6 wherein all clamps are applied before hardware timer scheduling.

Explain this claim with UniGrok
Claim 42independentLive OTA learning with atomic model swaps and replay

Discovery summary

Atomic model updates and replay learning

OTA active learningAtomic model updates and replay learning

Exact provisional claim wording

An over-the-air active learning system comprising double-buffered PSRAM arenas, FreeRTOS mutex-protected atomic pointer swap with __DMB memory fence, CRC32 validation, and prioritized replay buffer sampling (p_i ∝ |e_i|) with exponential learning-rate decay (τ = 30 s) to prevent catastrophic forgetting while the engine runs at 12,000 RPM.

Explain this claim with UniGrok
Claim 43dependentVersioned model rollback after CRC failure

Discovery summary

Atomic model updates and replay learning

OTA active learningAtomic model updates and replay learning

Exact provisional claim wording

Source references as written: 7

The system of claim 7 further comprising versioned rollback buffer on CRC failure.

Explain this claim with UniGrok
Claim 44dependentExponential learning-rate scheduling

Discovery summary

Atomic model updates and replay learning

OTA active learningAtomic model updates and replay learning

Exact provisional claim wording

Source references as written: 7

The system of claim 7 wherein learning rate α_t = α_0 × e^(-t/τ).

Explain this claim with UniGrok
Claim 45dependentLive and historical training-data replay mix

Discovery summary

Atomic model updates and replay learning

OTA active learningAtomic model updates and replay learning

Exact provisional claim wording

Source references as written: 7

The system of claim 7 further comprising 70/30 live/history mix in replay buffer.

Explain this claim with UniGrok
Claim 46dependentLow-latency atomic model swapping

Discovery summary

Atomic model updates and replay learning

OTA active learningAtomic model updates and replay learning

Exact provisional claim wording

Source references as written: 7

The system of claim 7 wherein swap latency <200 µs (<< 5 ms cycle).

Explain this claim with UniGrok
Claim 47dependentEncrypted flash storage for learned models

Discovery summary

Atomic model updates and replay learning

OTA active learningAtomic model updates and replay learning

Exact provisional claim wording

Source references as written: 7

The system of claim 7 further comprising AES-256-XTS flash encryption for model storage.

Explain this claim with UniGrok
Claim 48independentGPTimer hardware-in-the-loop crank waveform simulation

Discovery summary

Crank waveform simulation and timing validation

Hardware-in-the-loop testingCrank waveform simulation and timing validation

Exact provisional claim wording

A hardware-in-the-loop simulator using GPTimer ISR for per-tooth generation of a 36-1 VR waveform with exact missing-tooth normalization (gap = 2× tooth period), dynamic RPM control, and dedicated TDC sync pulse, achieving <4.16 ns jitter for sub-microsecond ECU validation.

Explain this claim with UniGrok
Claim 49dependentVoltage-safe 3.3 V simulator outputs

Discovery summary

Crank waveform simulation and timing validation

Hardware-in-the-loop testingCrank waveform simulation and timing validation

Exact provisional claim wording

Source references as written: 8

The simulator of claim 8 further comprising native 3.3 V output to prevent overvoltage damage.

Explain this claim with UniGrok
Claim 50dependent720-degree simulator cycle phasing

Discovery summary

Crank waveform simulation and timing validation

Hardware-in-the-loop testingCrank waveform simulation and timing validation

Exact provisional claim wording

Source references as written: 8

The simulator of claim 8 wherein tooth_counter modulo 720 enforces 720° cycle phasing.

Explain this claim with UniGrok
Claim 51dependentIRAM edge capture for logic analysis

Discovery summary

Crank waveform simulation and timing validation

Hardware-in-the-loop testingCrank waveform simulation and timing validation

Exact provisional claim wording

Source references as written: 8

The simulator of claim 8 further comprising logic analyzer mode with IRAM_ATTR edge capture.

Explain this claim with UniGrok
Claim 52dependentRPM-based simulator advance timing

Discovery summary

Crank waveform simulation and timing validation

Hardware-in-the-loop testingCrank waveform simulation and timing validation

Exact provisional claim wording

Source references as written: 8

The simulator of claim 8 wherein dynamic advance calculation uses live RPM for exact 1.388 µs/° resolution.

Explain this claim with UniGrok
Claim 53independentVoltage-compensated injection and ignition execution

Discovery summary

Voltage-compensated fuel and spark scheduling

Injection and ignition executionVoltage-compensated fuel and spark scheduling

Exact provisional claim wording

A kinematic execution function that translates AI targets into hardware timer events using voltage-compensated dead-time, inductance-based dwell, and tooth_counter angle-domain scheduling to ensure fuel injection occurs during intake valve open window and spark fires at commanded BTDC angle under all battery voltages.

Explain this claim with UniGrok
Claim 54dependentFiltered battery-voltage compensation

Discovery summary

Voltage-compensated fuel and spark scheduling

Injection and ignition executionVoltage-compensated fuel and spark scheduling

Exact provisional claim wording

Source references as written: 9

The function of claim 9 further comprising low-pass VBATT filter for stable compensation.

Explain this claim with UniGrok
Claim 55dependentCoil dwell scaling for target ignition energy

Discovery summary

Voltage-compensated fuel and spark scheduling

Injection and ignition executionVoltage-compensated fuel and spark scheduling

Exact provisional claim wording

Source references as written: 9

The function of claim 9 wherein dwell is scaled to achieve 50 mJ coil energy.

Explain this claim with UniGrok
Claim 56dependentNonnegative execution timing clamp

Discovery summary

Voltage-compensated fuel and spark scheduling

Injection and ignition executionVoltage-compensated fuel and spark scheduling

Exact provisional claim wording

Source references as written: 9

The function of claim 9 further comprising anti-hydrolock clamp t_wait_us = max(0U, ...).

Explain this claim with UniGrok
Claim 57dependentFixed-point kinematic execution without an FPU

Discovery summary

Voltage-compensated fuel and spark scheduling

Injection and ignition executionVoltage-compensated fuel and spark scheduling

Exact provisional claim wording

Source references as written: 9

The function of claim 9 wherein all timing uses Q15.16 fixed-point for FPU-free execution.

Explain this claim with UniGrok
Claim 58independentSecure automotive ECU with diagnostic and limp-mode safeguards

Discovery summary

Encryption diagnostics watchdogs and limp modes

ECU security and resilienceEncryption diagnostics watchdogs and limp modes

Exact provisional claim wording

An automotive ECU with AES-256-XTS flash encryption, eFuse secure boot, safe CAN pin isolation (GPIO21/22), SAE J1979-compliant OBD-II encoding, finite transmit timeout, and IRAM Alpha-N limp mode fallback on PSRAM failure to satisfy ISO 26262 ASIL-B requirements.

Explain this claim with UniGrok
Claim 59dependentTWAI bus-off recovery

Discovery summary

Encryption diagnostics watchdogs and limp modes

ECU security and resilienceEncryption diagnostics watchdogs and limp modes

Exact provisional claim wording

Source references as written: 10

The ECU of claim 10 further comprising TWAI bus-off recovery.

Explain this claim with UniGrok
Claim 60dependentOBD-II engine-speed payload encoding

Discovery summary

Encryption diagnostics watchdogs and limp modes

ECU security and resilienceEncryption diagnostics watchdogs and limp modes

Exact provisional claim wording

Source references as written: 10

The ECU of claim 10 wherein RPM payload uses (A×256 + B)/4 encoding.

Explain this claim with UniGrok
Claim 61dependentTask-watchdog servicing throughout controller loops

Discovery summary

Encryption diagnostics watchdogs and limp modes

ECU security and resilienceEncryption diagnostics watchdogs and limp modes

Exact provisional claim wording

Source references as written: 10

The ECU of claim 10 further comprising task watchdog feeding in all loops.

Explain this claim with UniGrok
Claim 62dependentHardcoded limp-mode table for PSRAM failure

Discovery summary

Encryption diagnostics watchdogs and limp modes

ECU security and resilienceEncryption diagnostics watchdogs and limp modes

Exact provisional claim wording

Source references as written: 10

The ECU of claim 10 wherein PSRAM failure triggers hardcoded limp table.

Explain this claim with UniGrok
Claim 63dependentParallel connector pins for ECU transient loads

Discovery summary

Encryption diagnostics watchdogs and limp modes

ECU security and resilienceEncryption diagnostics watchdogs and limp modes

Exact provisional claim wording

Source references as written: 10

The ECU of claim 10 further comprising parallel AMPSEAL pins for 27.41 A transients.

Explain this claim with UniGrok
Claim 64independentConfigurable engine control across cylinder counts

Discovery summary

Cylinder counts firing orders and trigger patterns

Modular engine configurationCylinder counts firing orders and trigger patterns

Exact provisional claim wording

A modular engine control system configurable for any N-cylinder 4-stroke engine by changing NUM_CYLINDERS, firing_order array, and trigger pattern parameters while retaining identical safety, AI, and kinematic code paths.

Explain this claim with UniGrok
Claim 65dependentCurrent scaling for overlapping cylinder channels

Discovery summary

Cylinder counts firing orders and trigger patterns

Modular engine configurationCylinder counts firing orders and trigger patterns

Exact provisional claim wording

Source references as written: 11

The system of claim 11 wherein current scaling automatically adjusts for N-channel overlap.

Explain this claim with UniGrok
Claim 66dependentFiring-order tables for two through eight cylinders

Discovery summary

Cylinder counts firing orders and trigger patterns

Modular engine configurationCylinder counts firing orders and trigger patterns

Exact provisional claim wording

Source references as written: 11

The system of claim 11 further comprising firing order table for 2/4/6/8 cylinders.

Explain this claim with UniGrok
Claim 67dependentConfigurable 24-2 and 36-1 crank trigger patterns

Discovery summary

Cylinder counts firing orders and trigger patterns

Modular engine configurationCylinder counts firing orders and trigger patterns

Exact provisional claim wording

Source references as written: 11

The system of claim 11 wherein trigger pattern (Z, M) is parameterized for 24-2 or 36-1 wheels.

Explain this claim with UniGrok
Claim 68independentIntegrated edge-AI engine management architecture

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

An end-to-end engine management system comprising hardware star-ground isolation, dual-core deterministic timing, TFLM INT8 inference with physics-derived scaling, closed-loop wideband PID with anti-windup, OTA active learning with replay buffer, HIL validation, and kinematic execution with voltage compensation that collectively achieve sub-microsecond spark accuracy and zero catastrophic forgetting.

Explain this claim with UniGrok
Claim 69dependentCoolant-temperature thermal runaway abort

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 further comprising thermal runaway abort (ECT > 110 °C).

Explain this claim with UniGrok
Claim 70dependentIRAM placement of timing-critical implementations

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 wherein all claims are implemented in IRAM_ATTR where timing-critical.

Explain this claim with UniGrok
Claim 71dependentCRC-validated OTA model replacement

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 further comprising CRC32-validated OTA model swap.

Explain this claim with UniGrok
Claim 72dependentExhaust-temperature rate monitoring in PID control

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 wherein PID uses dT/dt EGT monitoring.

Explain this claim with UniGrok
Claim 73dependentCumulative heat-soak energy tracking

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 further comprising cumulative BTU heat-soak tracking.

Explain this claim with UniGrok
Claim 74dependentGPTimer timing for hardware-in-the-loop validation

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 wherein HIL uses GPTimer for <4.16 ns jitter.

Explain this claim with UniGrok
Claim 75dependentMemory-failure limp mode in integrated engine control

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 further comprising ISO 26262 limp mode on memory failure.

Explain this claim with UniGrok
Claim 76dependentFlash encryption for all neural-model weights

Discovery summary

Combined edge-AI engine-control system

Integrated engine managementCombined edge-AI engine-control system

Exact provisional claim wording

Source references as written: 12

The system of claim 12 wherein flash encryption protects all model weights.

Explain this claim with UniGrok
Claim 77dependentTrace sizing for ECU high-current transients

Discovery summary

High-current ECU power and thermal design

ECU power hardwareHigh-current ECU power and thermal design

Exact provisional claim wording

Source references as written: 1

The apparatus of claim 1 further comprising IPC-2221 compliant trace widths for 27.41 A.

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Claim 78dependent16-byte aligned PSRAM inference memory

Discovery summary

Neural inference and deterministic timing isolation

Dual-core real-time controlNeural inference and deterministic timing isolation

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Source references as written: 3

The controller of claim 3 wherein tensor arena uses MALLOC_CAP_SPIRAM with 16-byte alignment.

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Claim 79dependentEMI debounce for short crank pulses

Discovery summary

Adaptive crank sensing and synchronization

Crank sensingAdaptive crank sensing and synchronization

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Source references as written: 2

The interface of claim 2 further comprising EMI debounce rejects pulses <150 µs.

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Source provenance

synapse_ai_provisional_patent.docx

Pending and included in the licensing portfolio. The supplied document names Tobias Hall and states March 8, 2026 as its filing date; an assigned application number is not supplied. Claim wording and dependency references are reproduced as written.